ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 150: Dynamic characteristics: charge pump…continued
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = −40 °C to +85 °C; CLOAD = 2 µF; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tVBUS(VALID_dly) minimum time VBUS(VALID)
error
100
-
200
µs
tVBUS(PULSE)
VBUS pulsing time
10
50
-
-
-
-
30
-
ms
ms
mV
tVBUS(VALID_dly) VBUS pull-down time
VRIPPLE
output ripple with constant
load
ILOAD = 8 mA
50
20.1 Programmed I/O timing
• If you are accessing only the HC, then the HC programmed I/O timing applies.
• If you are accessing only the DC, then the DC programmed I/O timing applies.
• If you are accessing both the HC and the DC, then the DC programmed I/O timing
applies.
20.1.1 HC Programmed I/O timing
Table 151: Dynamic characteristics: HC Programmed interface timing
Symbol
tAS
Parameter
Conditions
Min
5
Typ
Max
Unit
ns
address set-up time before CS
address hold time after CS
-
-
-
-
tAH
2
ns
Read timing
tSHSL_R
first RD/WR after command
(A0 = HIGH)
register access
buffer access
300
462
-
-
-
-
ns
ns
tSHSL_B
first RD/WR after command
(A0 = HIGH)
tSLRL
CS LOW to RD LOW
RD HIGH to CS HIGH
RD LOW pulse width
RD HIGH to next RD LOW
RD cycle
0
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
tRHSH
tRL
tRHRL
TRC
0
-
33
110
143
-
-
-
-
tRHDZ
tRLDV
Write timing
tWL
RD data hold time
3
22
RD LOW to data valid
-
WR LOW pulse width
WR HIGH to next WR LOW
WR cycle
26
110
136
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
tWHWL
TWC
tSLWL
tWHSH
tWDSU
tWDH
CS LOW to WR LOW
WR HIGH to CS HIGH
WR data set-up time
WR data hold time
0
3
4
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© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
135 of 150
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