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ISP1362BD 参数 Datasheet PDF下载

ISP1362BD图片预览
型号: ISP1362BD
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片通用串行总线- The-Go的控制器 [Single-chip Universal Serial Bus On-The-Go controller]
分类和应用: 控制器
文件页数/大小: 150 页 / 621 K
品牌: NXP [ NXP ]
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ISP1362  
Single-chip USB OTG controller  
Philips Semiconductors  
If the packet length is odd, the upper byte of the last word in an IN endpoint buffer  
is not transmitted to the host. When reading from an OUTendpoint buffer, the  
upper byte of the last word must be ignored by the rmware. The packet length is  
stored in the rst two bytes of the endpoint buffer.  
Table 107: DC command and register summary  
Name  
Destination  
Code (Hex)  
Transaction[1]  
Initialization commands  
Write Control OUT Conguration  
DcEndpointConguration register 20  
endpoint 0 OUT  
write 1 byte[2]  
write 1 byte[2]  
write 1 byte[2]  
read 1 byte[2]  
read 1 byte[2]  
read 1 byte[2]  
Write Control IN Conguration  
DcEndpointConguration register 21  
endpoint 0 IN  
Write Endpoint n Conguration  
(n = 1 to 14)  
DcEndpointConguration register 22 to 2F  
endpoint 1 to 14  
Read Control OUT Conguration  
DcEndpointConguration register 30  
endpoint 0 OUT  
Read Control IN Conguration  
DcEndpointConguration register 31  
endpoint 0 IN  
Read Endpoint n Conguration  
DcEndpointConguration register 32 to 3F  
(n = 1 to 14)  
endpoint 1 to 14  
Write or read Device Address  
Write or read Mode register  
DcAddress register  
DcMode register  
B6/B7  
B8/B9  
write or read 1 byte[2]  
write or read 1 byte[2]  
write or read 2 bytes  
write or read 4 bytes  
Write or read Hardware Conguration DcHardwareConguration register BA/BB  
Write or read DcInterruptEnable  
register  
DcInterruptEnable register  
C2/C3  
Write or read DMA Conguration  
Write or read DMA Counter  
Reset Device  
DcDMAConguration register  
DcDMACounter register  
resets all registers  
F0/F1  
F2/F3  
F6  
write or read 2 bytes  
write or read 2 bytes  
-
Data ow commands  
Write Control OUT Buffer  
Write Control IN Buffer  
illegal: endpoint is read-only  
buffer memory endpoint 0 IN  
(00)  
-
01  
N 64 bytes  
Write Endpoint n Buffer  
(n = 1 to 14)  
buffer memory endpoint 1 to 14  
(IN endpoints only)  
02 to 0F  
isochronous:  
N 1023 bytes  
interrupt/bulk: N 64 bytes  
Read Control OUT Buffer  
Read Control IN Buffer  
buffer memory endpoint 0 OUT  
illegal: endpoint is write-only  
10  
N 64 bytes  
(11)  
-
Read Endpoint n Buffer  
(n = 1 to 14)  
buffer memory endpoint 1 to 14  
(OUT endpoints only)  
12 to 1F  
isochronous:  
N 1023 bytes[4]  
interrupt/bulk: N 64 bytes  
Stall Control OUT Endpoint  
Stall Control IN Endpoint  
Endpoint 0 OUT  
Endpoint 0 IN  
40  
-
-
-
41  
Stall Endpoint n  
(n = 1 to 14)  
Endpoint 1 to 14  
42 to 4F  
Read Control OUT Status  
DcEndpointStatus register  
endpoint 0 OUT  
50  
51  
read 1 byte[2]  
read 1 byte[2]  
Read Control IN Status  
DcEndpointStatus register  
endpoint 0 IN  
9397 750 12337  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 03 06 January 2004  
111 of 150  
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