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ISP1362BD 参数 Datasheet PDF下载

ISP1362BD图片预览
型号: ISP1362BD
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片通用串行总线- The-Go的控制器 [Single-chip Universal Serial Bus On-The-Go controller]
分类和应用: 控制器
文件页数/大小: 150 页 / 621 K
品牌: NXP [ NXP ]
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ISP1362  
Single-chip USB OTG controller  
Philips Semiconductors  
Table 98: HcATLPTDDoneMap register: bit description  
Bit  
Symbol  
Access Value  
0000H  
Description  
31 to 0  
PTDDone  
Bits[31:0]  
R
0 The PTD stored in the ATL buffer was not  
successfully processed by the HC.  
1 The PTD stored in the ATL buffer was  
successfully processed by the HC.  
15.9.5 HcATLPTDSkipMap register (R/W: 1CH/9CH)  
This is a 32-bit register, and the bit description is given in Table 99. Bit 0 of the  
register represents the rst PTD stored in the ATL buffer, bit 1 represents the second  
PTD stored in the buffer, and so on. When the bit is set by the HCD, the  
corresponding PTD is skipped and is not processed by the HC. The HC processes  
the skipped PTD only if the HCD has reset its corresponding skipped bit to logic 0.  
Clearing the corresponding bit in the HcATLPTDSkipMap register when there is no  
valid data in the block will cause unpredictable behavior of the HC.  
Code (Hex): 1C read  
Code (Hex): 9C write  
Table 99: HcATLPTDSkipMap register: bit description  
Bit  
Symbol  
Access Value  
R/W 0000H  
Description  
31 to 0 SkipBits  
[31:0]  
0 The HC processes the PTD.  
1 The HC skips processing the PTD.  
15.9.6 HcATLLastPTD register (R/W: 1DH/9DH)  
This is a 32-bit register. Table 100 gives the bit description of the register. Bit 0 of the  
register represents the rst PTD stored in the ATL buffer, bit 1 represents the second  
PTD stored in the buffer, and so on. The bit that is set to logic 1 by the HCD is used  
as an indication to the HC that its corresponding PTD is the last PTD stored in the  
ATL buffer. When the processing of the last PTD is complete, the HC loops back to  
process the rst PTD stored in the buffer.  
Code (Hex): 1D read  
Code (Hex): 9D write  
Table 100: HcATLLastPTD register: bit description  
Bit  
Symbol  
Access Value Description  
31 to 0 LastPTD  
Bits[31:0]  
R/W 0000H 0 The PTD is not the last PTD stored in the  
buffer.  
1 The PTD is the last PTD stored in the buffer.  
15.9.7 HcATLCurrentActivePTD register (R: 1EH)  
This register indicates which PTD stored in the ATL buffer is currently active and is  
updated by the HC. The HCD can use it as a buffer pointer to decide which PTD  
locations are currently free for lling in new PTDs to the buffer. This indication helps  
to prevent the HCD from accidentally writing into the currently active PTD buffer  
location. Table 101 shows the bit allocation of the register.  
Code (Hex): 1E read only  
9397 750 12337  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 03 06 January 2004  
108 of 150  
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