ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 101: HcATLCurrentActivePTD register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
Symbol
Reset
Access
reserved
ActivePTD[4:0]
-
-
-
-
-
-
0
0
0
0
0
R
R
R
R
R
Table 102: HcATLCurrentActivePTD register: bit description
Bit
Symbol
Description
15 to 5
4 to 0
-
reserved
ActivePTD[4:0] This 5-bit number represents the PTD that is currently active.
15.9.8 HcATLPTDDoneThresholdCount register (R/W: 51H/D1H)
This register specifies the number of ATL PTD done required to trigger an ATL
PTDDoneCount. If set to 0x08, the HC would trigger the ATL interrupt (in the
HcµPInterrupt register) once for every 8 ATL PTD done. Table 103 shows the bit
allocation of the register.
Remark: Do not write 0x0000 to this register.
Code (Hex): 51 — read
Code (Hex): D1 — write
Table 103: HcATLPTDDoneThresholdCount register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
Symbol
Reset
Access
reserved
PTDDoneCount[4:0]
-
-
-
-
-
-
0
0
0
0
1
R/W
R/W
R/W
R/W
R/W
Table 104: HcATLPTDDoneThresholdCount register: bit description
Bit
Symbol
Description
15 to 5
4 to 0
-
reserved
PTDDoneCount[4:0] Number of PTDs processed by the HC.
15.9.9 HcATLPTDDoneThresholdTimeOut register (R/W: 52H/D2H)
This register indicates the number of ms from the last time when the ATL interrupt (in
the HcµPInterrupt register) was set, of which, if the number of ATL PTDDone is still
less than HcATLPTDDoneThresholdCount, the HC would trigger an ATL interrupt (in
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
109 of 150
NXP [ NXP ]
