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ISP1160BD 参数 Datasheet PDF下载

ISP1160BD图片预览
型号: ISP1160BD
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式通用串行总线主控制器 [Embedded Universal Serial Bus Host Controller]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 88 页 / 1864 K
品牌: NXP [ NXP ]
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ISP1160  
Embedded USB Host Controller  
Philips Semiconductors  
Table 47: HcChipID register: bit description  
Bit  
Symbol  
Description  
15 to 0  
ChipID[15:0]  
ISP1160’s chip ID  
10.5.2 HcScratch register (R/W: 28H/A8H)  
This register is for the HCD to save and restore values when required.  
Code (Hex): 28 — read  
Code (Hex): A8 — write  
Table 48: HcScratch register: bit allocation  
Bit  
15  
14  
13  
12  
11  
10  
9
8
Symbol  
Reset  
Access  
Bit  
Scratch[15:8]  
0
R/W  
7
0
R/W  
6
0
R/W  
5
0
R/W  
4
0
R/W  
3
0
R/W  
2
0
R/W  
1
0
R/W  
0
Symbol  
Reset  
Access  
Scratch[7:0]  
0
0
0
0
0
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Table 49: HcScratch register: bit description  
Bit  
Symbol  
Description  
15 to 0  
Scratch[15:0] Scratch register value  
10.5.3 HcSoftwareReset register (W: A9H)  
This register provides a means for software reset of the HC. To reset the HC, the HCD  
must write a reset value of F6H to this register. Upon receiving the reset value, the  
HC resets all the registers except its buffer memory.  
Code (Hex): A9 — write  
Table 50: HcSoftwareReset register: bit allocation  
Bit  
15  
14  
13  
12  
11  
10  
9
8
Symbol  
Reset  
Access  
Bit  
Reset[15:8]  
0
W
7
0
W
6
0
W
5
0
W
4
0
W
3
0
W
2
0
W
1
0
W
0
Symbol  
Reset  
Access  
Reset[7:0]  
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
Table 51: HcSoftwareReset register: bit description  
Bit  
Symbol  
Description  
15 to 0  
Reset[15:0] Writing a reset value of F6H will cause the HC to reset all the  
registers except its buffer memory.  
9397 750 11371  
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.  
Product data  
Rev. 04 — 04 July 2003  
63 of 88  
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