ISP1160
Embedded USB Host Controller
Philips Semiconductors
Code (Hex): 03 — read
Code (Hex): 83 — write
Table 14: HcInteruptStatus register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
Reset
Access
Bit
reserved
reserved
reserved
0
0
0
0
0
0
0
0
R/W
23
R/W
22
R/W
21
R/W
20
R/W
19
R/W
18
R/W
17
R/W
16
Symbol
Reset
Access
Bit
0
0
0
0
0
0
0
R/W
9
0
R/W
8
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
R/W
10
Symbol
Reset
Access
Bit
0
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
Symbol
Reset
Access
reserved
0
RHSC
0
FNO
0
UE
0
RD
0
SF
0
reserved
0
SO
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 15: HcInterruptStatus register: bit description
Bit
Symbol
-
Description
31 to 7
6
reserved
RHSC
RootHubStatusChange: This bit is set when the content of
HcRhStatus or the content of any of HcRhPortStatus[1:2] has
changed.
5
4
FNO
UE
FrameNumberOverflow: This bit is set when the MSB of
HcFmNumber (bit 15) changes value.
UnrecoverableError: This bit is set when the HC detects a
system error not related to USB. The HC does not proceed with
any processing nor signaling before the system error has been
corrected. The HCD clears this bit after the HC has been reset.
OHCI: Always set to logic 0.
3
2
RD
SF
ResumeDetected: This bit is set when the HC detects that a
device on the USB is asserting resume signaling from a state of no
resume signaling. This bit is not set when HCD enters the
USBResume state.
StartOfFrame: At the start of each frame, this bit is set by the HC
and an SOF generated.
1
0
-
reserved
SO
SchedulingOverrun: This bit is set when USB schedules for
current frame overruns. A scheduling overrun will also cause the
SchedulingOverrunCount of HcCommandStatus to be
incremented.
9397 750 11371
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 04 — 04 July 2003
41 of 88
NXP [ NXP ]
