ISP1160
Embedded USB Host Controller
Philips Semiconductors
6. Pinning information
6.1 Pinning
DGND
D2
1
2
3
4
5
6
7
8
9
48 n.c.
H_PSW2_N
47
D3
46 H_PSW1_N
45 DGND
D4
D5
44 XTAL2
D6
43
42
XTAL1
ISP1160BD
ISP1160BM
ISP1160BD/01
ISP1160BM/01
D7
H_SUSPEND
DGND
D8
41 n.c.
40
39
38
H_WAKEUP
TEST_LOW
n.c.
D9 10
D10 11
D11 12
37 TEST_LOW
D12
D13
n.c.
13
14
15
16
36
35
34
33
DGND
EOT
DGND
D14
NDP_SEL
004aaa060
Fig 2. Pin configuration LQFP64.
6.2 Pin description
Table 2:
Symbol[1]
Pin description for LQFP64
Pin
1
Type
-
Description
DGND
D2
digital ground
2
I/O
bit 2 of bidirectional data; slew-rate controlled; TTL input;
three-state output
D3
D4
3
4
I/O
I/O
bit 3 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 4 of bidirectional data; slew-rate controlled; TTL input;
three-state output
9397 750 11371
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 04 — 04 July 2003
4 of 88
NXP [ NXP ]
