Philips Semiconductors
Product specification
N-channel enhancement mode
TrenchMOS
TM
transistor
IRFZ48N
2.5
a
BUK959-60
Rds(on) normlised to 25degC
4
3.5
Thousands (pF)
2
3
2.5
2
1.5
1
5
Coss
Crss
100
Ciss
1.5
1
0.5
-100
-50
0
50
Tmb / degC
100
150
200
0
0.01
0.1
1
VDS/V
10
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
VGS(TO) / V
max.
4
typ.
3
min.
2
BUK759-60
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
12
VGS/V
10
VDS = 14V
8
VDS = 44V
5
6
4
1
2
0
-100
-50
0
50
Tj / C
100
150
200
0
0
10
20
30 QG/nC 40
50
60
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Sub-Threshold Conduction
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 50 A; parameter V
DS
100
IF/A
80
1E-01
1E-02
2%
typ
98%
60
Tj/C =
40
175
25
1E-03
1E-04
20
1E-05
0
1E-06
0
0.2
0.4
0
1
2
3
4
5
0.6
0.8
VSDS/V
1
1.2
1.4
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
February 1999
5
Rev 1.000
PHILIPS [ NXP SEMICONDUCTORS ]
