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IRFZ48N 参数 Datasheet PDF下载

IRFZ48N图片预览
型号: IRFZ48N
PDF下载: 下载PDF文件 查看货源
内容描述: N沟道增强模式的TrenchMOS晶体管 [N-channel enhancement mode TrenchMOS transistor]
分类和应用: 晶体晶体管功率场效应晶体管开关脉冲局域网
文件页数/大小: 8 页 / 68 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
Product specification
N-channel enhancement mode
TrenchMOS
TM
transistor
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope using
’trench’ technology. The device
features very low on-state resistance
and has integral zener diodes giving
ESD protection up to 2kV. It is
intended for use in switched mode
power supplies and general purpose
switching applications.
IRFZ48N
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V
GS
= 10 V
MAX.
55
64
140
175
16
UNIT
V
A
W
˚C
mΩ
PINNING - TO220AB
PIN
1
2
3
tab
gate
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
s
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
20
64
45
210
140
175
UNIT
V
V
V
A
A
A
W
˚C
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage, all pins
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
MAX.
2
UNIT
kV
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
in free air
TYP.
-
60
MAX.
1.1
-
UNIT
K/W
K/W
February 1999
1
Rev 1.000