PFS122
8bit MTP MCU with 12-bit R-Type ADC
6.4. Interrupt Enable Register (inten), IO address = 0x04
Bit
7
Reset
R/W
Description
0
0
0
0
0
0
0
0
R/W
Enable interrupt from Timer3. 0 / 1: disable / enable
6
R/W Enable interrupt from Timer2. 0 / 1: disable / enable
5
-
Reserved
4
R/W
Enable interrupt from comparator. 0 / 1: disable / enable
3
R/W Enable interrupt from ADC. 0 / 1: disable / enable
R/W Enable interrupt from Timer16 overflow. 0 / 1: disable / enable
R/W Enable interrupt from PB0/PA4. 0 / 1: disable / enable
R/W Enable interrupt from PA0/PB5. 0 / 1: disable / enable
2
1
0
6.5. Interrupt Request Register (intrq), IO address = 0x05
Bit Reset R/W
Description
Interrupt Request from Timer3, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
7
-
R/W
Interrupt Request from Timer2, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
6
5
4
-
-
-
R/W
-
Reserved
Interrupt Request from comparator, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
R/W
Interrupt Request from ADC, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
3
2
1
0
-
-
-
-
R/W
R/W
R/W
R/W
Interrupt Request from Timer16, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
Interrupt Request from pin PB0/PA4, this bit is set by hardware and cleared by software.
0 / 1: No request / Request
Interrupt Request from pin PA0/PB5, this bit is set by hardware and cleared by software.
0 / 1: No Request / request
©Copyright 2020, PADAUK Technology Co. Ltd
Page 62 of 93
PDK-DS-PFS122-EN_V000-May 28, 2020
PADAUK [ PADAUK Technology ]
