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OXCB950-TQAG 参数 Datasheet PDF下载

OXCB950-TQAG图片预览
型号: OXCB950-TQAG
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的高性能UART的Cardbus / 3.3V PCI接口 [Integrated High Performance UART Cardbus / 3.3v PCI interface]
分类和应用: PC
文件页数/大小: 67 页 / 598 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OXCB950  
OXFORD SEMICONDUCTOR LTD.  
reset is hi-impedance. As the circuitry is disabled, the  
transistor connected to the CCLKRUN# line is off and so  
the state of the CCLKRUN# signal pin is controlled by the  
host, which will be holding the pin in the asserted state  
(clock running) as the inserted device needs to be  
enumerated and configured. When the operating system  
hands control to the custom device driver, the device driver  
will assigned a logic '1' to the pin MIO0 to enable the clock  
control circuitry which will begin to monitor the status of the  
CCLKRUN# line.  
When the host intends on stopping the clock, it negates the  
CCLKRUN# line by synchronously driving the CCLKRUN#  
line to logic '1' and then releasing its drive to this line. This  
will also result in the CCLKRUN# line being a logic '1' due  
to the presence of a pull-up on the host end of the  
interface.  
When the clock control circuitry has sampled the negation  
of the CCLKRUN# line for 2 samples, this results in the  
open-collector transistor to be driven, thereby asserting the  
CCLKRUN# line (this time by the target). In other words,  
the clock control circuitry asserts the CCLKRUN# line 2  
clocks after it had been negated by the host. This is the  
required signalling to the host to prevent it from completing  
its original intention of stopping the clock. The clock line  
CCLK continues to run uninterrupted.  
While the host continues to assert the CCLKRUN# line, to  
indicate clock run, the clock control circuitry continuously  
samples logic '0' that results in the open-collector transistor  
being held in the off-state.  
CCLK  
CCLKRUN#  
Q1  
Q2/  
transistor  
drive  
CCLK continues to run  
Uninterrupted.  
CLKRUN# driven  
by host. Clock  
control circuitry  
contains all 0’s  
Clock control  
samples  
thus keeping  
transistor off  
Clock control negates  
drive to transistor, but  
CCLKRUN# now held  
asserted by the host  
CCLKRUN#  
negated for 1  
clock cycle  
Clock control samples  
(during period transistor  
CCLKRUN# negated  
was driven)  
for 2 clock cycles.  
Host synchronously  
Turns on transistor to  
assert CCLKRUN# line.  
negates CCLKRUN# to  
indicate intention of  
stopping clock.  
OXCB950 DataSheet  
MIS-0004 Jul 04 External-Free Release  
Page 57  
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