NCN8024R
HOST INTERFACE SECTION CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc, CLKDIV1, CLKDIV2, CMDVCC, 5V/3V
(V = 3.3 V; V
= 5 V; T
= 25°C; F = 10 MHz)
DD
DDP
amb
CLKIN
Symbol
Rating
Min
−
Typ
−
Max
27
Unit
MHz
V
F
Clock Frequency on Pin CLKIN (with Divider Ratio w 2) (Note 6)
CLKIN
V
IL
Input Voltage Level Low: CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc, CLKDIV1,
CLKDIV2, CMDVCC, 5V/3V
−0.3
−
0.3 x V
DD
V
Input Voltage Level High: CLKIN, RSTIN, I/O, AUX1, AUX2, CLKDIV1, CLKDIV2,
CMDVCC, 5V/3V
0.7 x V
−
−
−
V + 0.3
DD
V
IH
DD
|I |
IL
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, 5V/3V Low Level Input Leakage
−
−
1.0
mA
mA
Current, V = 0 V
IL
|I
IH
|
CLKDIV1, CLKDIV2, CMDVCC, RSTIN, CLKIN, 5V/3V Low Level Input Leakage
1.0
Current, V = V
IH
DD
V
Input Voltage Level Low: I/Ouc, AUX1uc, AUX2uc
Input Voltage Level High: I/Ouc, AUX1uc, AUX2uc
−0.3
−
−
−
−
V
V
IL
0.5
V
IH
0.7 x V
V
+ 0.3
DD
DD
|I |
IL
I/Ouc, AUX1uc, AUX2uc Low Level Input Leakage Current, V = 0 V
−
−
600
10
mA
mA
IL
|I
IH
|
I/Ouc, AUX1uc, AUX2uc High Level Input Leakage Current, V = V
IH
DD
I/Ouc, AUX1uc, AUX2uc data channels, @ Cs v 30 pF
V
OH
High Level Output Voltage (CRD_I/O = CRD_AUX1 = CRD_AUX2 = CRD_V
)
CC
I
I
= 0
0.9 x V
−
−
V
DD
V
DD
+ 0.1
+ 0.1
V
V
OH
OH
DD
DD
= −40 mA for V > 2 V (I = −20 mA for V ≤ 2 V)
0.75 x V
DD
OH
DD
V
Low Level Output Voltage (CRD_I/O= CRD_AUX1 = CRD_AUX2 = 0 V)
= +1 mA
OL
I
OL
0
−
−
0.3
V
t
Ri/Fi
Input Rising/Falling Times (Note 6)
Output Rising/Falling Times (Note 6)
−
1.2
ms
t
Ro/Fo
−
−
−
−
0.1
1
ms
MHz
kW
V
F
Maximum Frequency through Bidirectional I/O, AUX1 and AUX2 Channels (Note 6)
I/0uc, AUX1uc, AUX2uc Pullup Resistor
bidi
R
8.0
11
16
pu
V
OH
Output High Voltage
INT @ I = −15 mA (Source)
0.6 x V
−
−
OH
DD
V
Output Low Voltage
V
OL
INT @ I = 2 mA (Sink)
0
−
0.30
60
OL
R
INT
INT Pullup Resistor
40
50
kW
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed
circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the
declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device
specification limit values are applied individually under normal operating conditions and not valid simultaneously.
6. Guaranteed by design and characterization
http://onsemi.com
7