NCN8024R
VDD
21
VDDP
6
9
CRD_PRES
CRD_PRES
Interrupt Block
Card Detection
INT
23
3
10
Supply Voltage
Monitoring
5V/3V
CMDVCC 19
3.0 V / 5.0 V LDO
CRD_VCC
17
14
4
18
1
PORADJ
CLKDIV1
CRD_GND
GNDP
CLKDIV2
2
Thermal Control
24
CLKIN
Clock Dividers
CRD_CLK
CRD_RST
15
16
11
13
12
25
20
NC
Control Logic
and Sequencer
Card Pin
Drivers
RSTIN
I/Ouc
CRD_I/O
26
27
28
22
AUX2uc
CRD_AUX2
CRD_AUX1
AUX1uc
GND
Figure 3. NCN8024R Block Diagram
PIN FUNCTION AND DESCRIPTION
Pin #
Name
CLKDIV1
CLKDIV2
5V/3V
Type
Input
Input
Input
Description
1
2
3
This pin coupled with CLKDIV2 is used to program the clock frequency division ratio (Table 1).
This pin coupled with CLKDIV1 is used to program the clock frequency division ratio (Table 1).
Allows selecting card V power supply voltage. CRD_V = 5 V when 5V/3V = HIGH or 3 V when
CC
CC
5V/3V = LOW
4
5
6
7
8
9
GNDP
NC
GND
Regulator Power Supply Ground
Not Connected
−
VDDP
NC
Power Regulator Power Supply
−
−
Not Connected
Not Connected
NC
CRD_PRES
Input
Card presence pin active (card present) when CRD_PRES = Low. A built−in debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Open (NO) smart card
connector.
10
CRD_PRES
Input
Card presence pin active (card present) when CRD_PRES = High. A built−in debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Closed (NC) smart card
connector.
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