––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ ML53612 ■
[1] [2]
5.3 Internal Address Map
AR
Register
0014h:0000h
00ffh:00fch
1007h:1000h
203fh:2000h
303fh:3000h
403fh:4000h
503fh:5000h
603fh:6000h
703fh:7000h
Configuration
Device ID
Stream Switch Routing Ch. 7:0
Transmit Switch Routing Ch. 63:0
Receive Switch Routing Ch. 63:0
Indirect Transmit Switch Parallel Access Ch. 63:0
Indirect Receive Switch Parallel Access Ch. 63:0
Transmit Switch Conversion Ch. 63:0
Receive Switch Parallel Conversion Ch. 63:0
1. AR is the concatenation of AR_1 and AR_0.
2. All other locations reserved (Read-back = 00, Write has no effect).
Oki Semiconductor
15