––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ ML53612 ■
5.0 REGISTERS
5.1 Microprocessor Address Map
With Direct Parallel Access Disabled (C_[96] = 0) (Default)
A_[2:0]
7h
Register
Reserved
6h
Data Register 2 (DR_2)
Data Register 1 (DR_1)
Data Register 0 (DR_0)
Reserved
5h
4h
3h
2h
Address Register 1 (AR_1)
Address Register 0 (AR_0)
Command/Status Register
1h
0h
With Direct Parallel Access Enabled (C_[96] = 1)
A_[9:0]
Register
FFh:C0h
BFh:80h
7Fh:08h
07h
Direct Receive Switch Parallel Access Ch. 63:0
Direct Transmit Switch Parallel Access Ch. 63:0
Reserved
Reserved
06h
Data Register 2 (DR_2)
Data Register 1 (DR_1)
Data Register 0 (DR_0)
Reserved
05h
04h
03h
02h
Address Register 1 (AR_1)
Address Register 0 (AR_0)
Command/Status Register
01h
00h
Oki Semiconductor
13
OKI [ OKI ELECTRONIC COMPONETS ]
