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TJA1028 参数 Datasheet PDF下载

TJA1028图片预览
型号: TJA1028
PDF下载: 下载PDF文件 查看货源
内容描述: LIN收发器集成稳压器 [LIN transceiver with integrated voltage regulator]
分类和应用: 稳压器
文件页数/大小: 24 页 / 198 K
品牌: NXP [ NXP ]
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TJA1028  
NXP Semiconductors  
LIN transceiver with integrated voltage regulator  
7.4 Remote wake-up  
A remote wake-up is triggered by a falling edge on pin LIN, followed by LIN remaining  
LOW for at least twake(busdom)min, followed by a rising edge on pin LIN (see Figure 5).  
LIN recessive  
V
BAT  
0.6V  
BAT  
V
LIN  
0.4V  
t
wake(busdom)min  
BAT  
LIN dominant  
ground  
Standby/Sleep mode  
Standby mode  
LOW  
Sleep: floating/Standby: HIGH  
RXD  
015aaa088  
Fig 5. Remote wake-up behavior  
The remote wake-up request is communicated to the microcontroller in Standby mode by  
a continuous LOW level on pin RXD.  
Note that twake(busdom)min is measured in Sleep and Standby modes, and in Normal mode if  
TXD is HIGH.  
7.5 Fail-safe features  
7.5.1 General fail-safe features  
The following general fail-safe features have been implemented:  
An internal pull-up towards VCC on pin TXD guarantees a recessive bus level if the pin  
is left floating by a bad solder joint or floating microcontroller port pin.  
The current in the transmitter output stage is limited in order to protect the transmitter  
against short circuits to pin VBAT  
.
A loss of power (pins VBAT and GND) has no impact on the bus line or on the  
microcontroller. There will be no reverse currents from the bus.  
The LIN transmitter is automatically disabled when either EN or RSTN is LOW.  
After a transition to Normal mode, the LIN transmitter is only enabled if a recessive  
level is present on pin TXD.  
7.5.2 TXD dominant time-out function  
A TXD dominant time-out timer circuit prevents the bus line being driven to a permanent  
dominant state (blocking all network communications) if TXD is forced permanently LOW  
by a hardware or software application failure. The timer is triggered by a negative edge on  
the TXD pin. If the pin remains LOW for longer than the TXD dominant time-out time  
(tto(dom)TXD), the transmitter is disabled, driving the bus line to a recessive state. The timer  
is reset by a positive edge on TXD.  
TJA1028  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 2 — 25 February 2011  
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