NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Low output voltage range [1]
High output voltage range
Set point
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
SW3x[6:0]
0100011
0100100
0100101
0100110
0100111
0101000
0101001
0101010
0101011
0101100
0101101
0101110
0101111
0110000
0110001
0110010
0110011
0110100
0110101
0110110
0110111
0111000
0111001
0111010
0111011
0111100
0111101
0111110
0111111
SW3x output
1.2750
1.3000
1.3250
1.3500
1.3750
1.4000
1.4250
1.4500
1.4750
1.5000
1.5250
1.5500
1.5750
1.6000
1.6250
1.6500
1.6750
1.7000
1.7250
1.7500
1.7750
1.8000
1.8250
1.8500
1.8750
1.9000
1.9250
1.9500
1.9750
Set point
99
SW3x[6:0]
1100011
1100100
1100101
1100110
1100111
1101000
1101001
1101010
1101011
1101100
1101101
1101110
1101111
1110000
1110001
1110010
1110011
1110100
1110101
1110110
1110111
1111000
1111001
1111010
1111011
1111100
1111101
1111110
1111111
SW3x output
2.5500
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
2.6000
2.6500
2.7000
2.7500
2.8000
2.8500
2.9000
2.9500
3.0000
3.0500
3.1000
3.1500
3.2000
3.2500
3.3000
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
[1] For voltage less than 2.0 V, use set points 0 to 63.
Table 64 provides a list of registers used to configure and operate SW3A/B. A detailed
description on each of these registers is provided in Table 65 to Table 74.
Table 64.ꢀSW3AB register summary
Register
Address
Output
SW3AVOLT
0x3C
SW3A output voltage set point on normal operation
PF4210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
66 / 137