NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
i.MX 8M
PROCESSOR
EXTERNAL
REGULATOR
EXTERNAL
REGULATOR
3.3 V, 8.0 A
VIN
0.9 V
CORTEX A53 PLATFORM
QUAD CORTEX-A53
L1 CACHE
EXTERNAL
REGULATOR
0.9 V
L2 CONTROLLER AND SCU
L2 CACHE MEMORY
PMIC
PF4210
VDD_ARM (0.9 V/1.0 V @ 4.0 A)
VDD_GPU (0.9 V/1.0 V @ 2.0 A)
SW1AB
0.9 V, 2.5 A
GPU
VPU
VDD_VPU (0.9 V/1.0 V @ 1.0 A)
VDD_SOC (0.9 V @ 3.6 A)
SW1C
0.9 V, 2.0 A
SOC (always ON)
DISPLAYMIX
3.3 V GPIO PAO
1.8 V GPIO PAO
eFuse
LOAD
SWITCH
NVCC_XXX (3.3 V @ 150 mA)
NVCC_XXX (1.8 V @ 100 mA)
EFUSE_VQPS
SW4A
1.8 V, 1.0 A
ENABLE
VDDA_1P8 (1.8 V @ 250 mA)
VGEN4
1.8 V, 350 mA
PLL
XTAL
TEMPERATURE SENSOR
VDD_DRAM (1.0 V @ 3.0 A)
SW3AB
1.0 V, 3.0 A
DRAM CONTROLLER
DRAM PHY
VDDA_DRAM (1.8 V @ 50 mA)
NVCC_DRAM (1.1 V/1.2 V/1.35 V @ 700 mA)
SW2
1.1 V, 2.5 A
LPDDR4
1.8 V @ 50 mA
PCIE_VPH
VGEN3
1.8 V, 100 mA
PCIE_VP
PCIe PHY
HDMI PHY
PCIE_VPTX
HDMI_AVDDIO
HDMI_AVDDCLK
HDMI_AVDDCORE
VGEN2
0.9 V, 250 mA
MIPI_VDDA
MIPI PHY
0.9 V @ 250 mA
3.3 V @ 100 mA
MIPI_VDDHA
VGEN5
3.3 V, 100 mA
USB_P1_VDD33
USB_P1_VPH
USB_P1_DVDD
USB_P1_VP
VSNVS 1.0 V,
USB PHY1
1.5 mA or 1.0 mA
USB_P1_VPTX
VGEN1
1.5 V, 100 mA
USB_P2_VDD33
USB_P2_VPH
USB_P2_DVDD
USB_P2_VP
USB PHY2
VGEN6
2.8 V, 200 mA
USB_P2_VPTX
VDD_SNVS
SNVS_LP
PMIC PAD
NVCC_SNVS
CAMERA
SD2
aaa-026477
Figure 8.ꢀPF4210 typical power map
10.4.4 Buck regulators
Each buck regulator is capable of operating in PFM, APS, and PWM switching modes.
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
32 / 137
NXP [ NXP ]
