NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Table 26.ꢀPower tree summary
Supply
Output voltage (V)
Step size (mV)
Maximum load current
(mA)
SW1A/B
SW1C
0.3 to 1.875
0.3 to 1.875
0.4 to 3.3
25
2500
2000
2500
1500 [1]
1000
600
25
SW2
25/50
25/50
25/50
50
SW3A/B
SW4
0.4 to 3.3
0.5*SW3A_OUT, 0.4 to 3.3
5.00/5.05/5.10/5.15
0.80 to 1.55
0.80 to 1.55
1.8 to 3.3
SWBST
VGEN1
VGEN2
VGEN3
VGEN4
VGEN5
VGEN6
VSNVS
50
100
50
250
100
100
100
50
100
1.8 to 3.3
350
1.8 to 3.3
100
1.8 to 3.3
200
1.0 to 3.0
NA
1.5 (consumer version)
1.0 (industrial version)
VREFDDR 0.5*SW3A_OUT
NA
10
[1] Current rating per independent phase, when SW3A/B is set in single or dual phase, current capability is up to 3000 mA.
Figure 8 shows a simplified power map with various recommended options to supply the
different block within the PF4210, as well as the typical application voltage domain on the
i.MX processor. Note that each application power tree is dependent upon the system's
voltage and current requirements, therefore a proper input voltage should be selected for
the regulators.
The minimum operating voltage for the main VIN supply is 2.8 V, for lower voltage proper
operation is not guaranteed. However at initial power up, the input voltage must surpass
the rising UVDET threshold before proper operation is guaranteed. Table 27 summarizes
the UVDET thresholds.
Table 27.ꢀUVDET threshold
UVDET threshold
Rising
VIN
3.1 V
2.65 V
Falling
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
31 / 137
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