LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
Table 9 shows wake-up sources for reduced power modes.
Table 9.
Wake-up sources for reduced power modes
Power mode Wake-up source
Conditions
Sleep
Any interrupt
HWWAKE
Enable interrupt in NVIC.
Certain Flexcomm Interface and DMIC subsystem activity.
Enable pin interrupts in NVIC and STARTER0 and/or STARTER1 registers.
• Enable interrupt in NVIC and STARTER0 registers.
Deep-sleep
Pin interrupts
BOD interrupt
• Enable interrupt in BODCTRL register.
• Configure the BOD to keep running in this mode with the power API.
BOD reset
Enable reset in BODCTRL register.
Watchdog interrupt
• Enable the watchdog oscillator in the PDRUNCFG0 register.
• Enable the watchdog interrupt in NVIC and STARTER0 registers.
• Enable the watchdog in the WWDT MOD register and feed.
• Enable interrupt in WWDT MOD register.
• Configure the WDTOSC to keep running in this mode with the power API.
• Enable the watchdog oscillator in the PDRUNCFG0 register.
• Enable the watchdog and watchdog reset in the WWDT MOD register and feed.
Always available.
Watchdog reset
Reset pin
RTC 1 Hz alarm timer
• Enable the RTC 1 Hz oscillator in the RTCOSCCTRL register.
• Enable the RTC bus clock in the AHBCLKCTRL0 register.
• Start RTC alarm timer by writing a time-out value to the RTC COUNT register.
• Enable the RTCALARM interrupt in the STARTER0 register.
RTC 1 kHz timer
time-out and alarm
• Enable the RTC 1 Hz oscillator and the RTC 1 kHz oscillator in the RTC CTRL
register.
• Start RTC 1 kHz timer by writing a value to the WAKE register of the RTC.
• Enable the RTC wake-up interrupt in the STARTER0 register.
• Enable the watchdog oscillator in the PDRUNCFG0 register.
• Enable the Micro-tick timer clock by writing to the AHBCLKCTRL1 register.
• Start the Micro-tick timer by writing UTICK CTRL register.
• Enable the Micro-tick timer interrupt in the STARTER0 register.
Interrupt from I2C in slave mode.
Micro-tick timer
(intended for ultra-low
power wake-up from
deep-sleep mode
I2C interrupt
SPI interrupt
Interrupt from SPI in slave mode.
USART interrupt
Interrupt from USART in slave or 32 kHz mode.
USB0 need clock
interrupt
Interrupt from USB0 when activity is detected that requires a clock.
USB1 need clock
interrupt
Interrupt from USB1 when activity is detected that requires a clock.
Ethernet interrupt
DMA interrupt
HWWAKE
Interrupt from ethernet.
Interrupt from DMA.
Certain Flexcomm Interface and DMIC subsystem activity.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
67 of 168
NXP [ NXP ]
