LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
(1 per Flexcomm)
main_clk
000
fro_12m
000
001
010
011
100
111
pll_clk
001
fcn_fclk
fro_hf_div
audio_pll_clk
mclk_in
(function clock
of Flexcomm[0-9])
fro_12m
010
fro_hf
011
“none”
111
(up to 11 Flexcomm
Interfaces on these
devices)
FRG CLOCK
DIVIDER
frg_clk
“none”
to MCAN0
main_clk
main_clk
function clock
MCAN0 clock
divider
FRGCTRL[15:0]
FRG clock select
FRGCLKSEL[2:0]
FCLKSEL[0-9]
to CLK32K of all Flexcomms (fc0-fc9)
32k_clk
CAN0CLKDIV
to MCAN1
function clock
MCAN1 clock
divider
main_clk
000
001
010
011
100
111
fcn_fclk
(function clock
of Flexcomm10)
pll_clk
usb_pll_clk
fro_hf
audio_pll_clk
“none”
CAN1CLKDIV
to Smartcard0
function clock
main_clk
main_clk
Smartcard0
clock divider
FCLKSEL10
SC0CLKDIV
to Smartcard1
function clock
main_clk
pll_clk
000
001
010
011
111
to SCTimer/PWM
input clock 7
Smartcard1
clock divider
SCTimer/PWM
fro_hf
audio_pll_clk
“none”
Clock Divider
SC1CLKDIV
SCTCLKDIV
to ARM Trace
function clock
SCT clock select
SCTCLKSEL[2:0]
main_clk
ARM Trace
clock divider
ARMTRACECLKDIV
main_clk
lcdclkin
fro_hf
00
01
10
11
to LCD
(function clock)
LCD CLOCK
DIVIDER
“none”
main_clk
pll_clk
usb_pll_clk
000
001
010
011
100
111
LCDCLKDIV
to SPIFI
(function clock)
LCD clock select
LCDCLKSEL[1:0]
SPIFI CLOCK
DIVIDER
fro_hf
audio_pll_clk
“none”
SPIFI CLKDIV
main_clk
clk_in
wdt_clk
SPIFI clock select
SPIFICLKSEL[2:0]
000
001
010
011
100
101
fro_hf
pll_clk
usb_pll_clk
to Cortex-M4
System Tick
Timer
main_clk
CLKOUT
Systick Clock
Divider
CLKOUT
000
wdt_clk
001
DIVIDER
32k_clk
010
audio_pll_clk
32k_clk
CLKOUTDIV
SYSTICKCLKDIV
fro_12
110
111
011
“none”
111
CLKOUT select
CLKOUTSEL[2:0]
Systic clock select
SYSTICKCLKSEL[2:0]
aaa-029070
Fig 12. LPC540xx clock generation (continued)
LPC540xx
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
64 of 168
NXP [ NXP ]
