Signal Definitions (Continued)
2.4 POWER PLANES
Figure 2-6 shows layout recommendations for splitting the
power plane between VCC2 (core: 2.9V) and VCC3 (I/O:
3.3V) volts in the BGA package.
Figure 2-7 shows layout recommendations for splitting the
power plane between VCC2 (core: 2.9V) and VCC3 (I/O:
3.3V) volts for the GXm in the SPGA package.
The illustration assumes there is one power plane, and no
components on the back of the board
3.3V Plane
(VCC3)
26
A
1
A
2.9V Plane
(VCC2)
3.3V Plane
(VCC3)
Geode™ GXm
Processor
352 BGA - Top View
2.9V Plane
(VCC2)
AF
AF
1
26
Legend
3.3V Plane
(VCC3)
= High frequency capacitor
= 220µF, low ESR capacitor
= 3.3V connection
= 2.9V connection
Figure 2-6. BGA Recommended Split Power Plane and Decoupling
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