Signal Definitions (Continued)
2.2.5 Power, Ground, and No Connect Signals
BGA
SPGA
Signal Name
Pin No. Pin No.
Type
Description
VOLDET
AC5
AM36
O
Voltage Detect
In early schematic revisions this pin was identified as VOLDET.
However, in the production version this pin is a "no connect" and
should be left disconnected.
VSS
VCC2
VCC3
NC
Refer
toTable toTable
2-3
(Total
of 71)
Refer
GND
PWR
PWR
Ground Connection
2-5
(Total
of 50)
Refer
toTable toTable
2-3
(Total
of 32)
Refer
2.9V (nominal) Core Power Connection
3.3V (nominal) I/O Power Connection
2-5
(Total
of 32)
Refer
toTable toTable
2-3
(Total
of 32)
Refer
2-5
(Total
of 18)
--
Q5, X2,
Z2
No Connection
A line designated as NC should be left disconnected.
2.2.6
Internal Test and Measurement Signals
BGA SPGA
Signal Name
Pin No. Pin No.
Type
Description
Float
FLT#
AC2
AJ3
I
Float Outputs force the GXm processor to float all outputs in the
high-impedance state and to enter a power-down state.
RW_CLK
TEST[3:0]
AE6
AL11
O
O
Raw Clock
This output is the GXm processor clock. This debug signal can
be used to verify clock operation.
B22,
A23,
B21,
C21
D28,
B32,
D26,
A33
SDRAM Test Outputs
These outputs are used for internal debug only.
TCLK
TDI
J2
(PU)
P4
(PU)
I
I
Test Clock
JTAG test clock.
This pin is internally connected to a 20-kohm pull-up resistor.
Test Data Input
D2
F4
(PU)
(PU)
JTAG serial test-data input.
This pin is internally connected to a 20-kohm pull-up resistor.
Test Data Output
TDO
F1
J1
O
JTAG serial test-data output.
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