CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
3.3.3 PCI bus interface pins
Pin Name
I/O
Input
Function
Active
I_PCLK
PCI clock input
−
O_PCIRST_B
I_AD0 to I_AD31
O_AD0 to O_AD31
EN_AD
Output
Input
PCI reset output
Low
PCI address/data input
PCI address/data output
−
−
Output
Output
PCI address/data output enable output
High
(Output buffer enable of O_AD0 to O_AD31)
I_CBE0 to I_CBE3
O_CBE0 to O_CBE3
EN_CBE
Input
PCI command/byte enable input
PCI command/byte enable output
Low
Low
High
Output
Output
PCI command/byte enable output enable output
(Output buffer enable of O_CBE0 to O_CBE3)
I_FRAME_B
O_FRAME_B
EN_FRAME
Input
PCI frame input
PCI frame output
Low
Low
High
Output
Output
PCI frame output enable output
(Output buffer enable of O_FRAME_B)
I_IRDY_B
O_IRDY_B
EN_IRDY
Input
PCI initiator ready input
PCI initiator ready output
Low
Low
High
Output
Output
PCI initiator ready output enable output
(Output buffer enable of O_IRDY_B)
I_DEVSEL_B
O_DEVSEL_B
EN_DEVSEL
Input
PCI device select input
PCI device select output
Low
Low
High
Output
Output
PCI device select output enable output
(Output buffer enable of O_DEVSEL_B)
I_TRDY_B
O_TRDY_B
EN_TRDY
Input
PCI target ready input
PCI target ready output
Low
Low
High
Output
Output
PCI target ready output enable output
(Output buffer enable of O_TRDY_B)
I_STOP_B
O_STOP_B
EN_STOP
Input
PCI stop input
PCI stop output
Low
Low
High
Output
Output
PCI stop output enable output
(Output buffer enable of O_STOP_B)
I_PAR
Input
PCI parity input
PCI parity output
−
−
O_PAR
EN_PAR
Output
Output
PCI parity output enable output
(Output buffer enable of O_PAR)
High
I_PERR_B
O_PERR_B
EN_PERR
Input
PCI parity error input
PCI parity error output
Low
Low
High
Output
Output
PCI parity error output enable output
(Output buffer enable of O_PERR_B)
I_SERR_B
Input
PCI system error input
PCI request input
PCI grant output
Low
Low
Low
I_REQ_B1 to I_REQ_B7
O_GNT_B1 to O_GNT_B7
Input
Output
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Application Note U17121EJ1V1AN
NEC [ NEC ]
