V58C2128(804/404/164)S
QFC function
QFC function
when driven low on reads coincident with the start of preamble, this DRAM output signal says that one cy-
cle later there will be the first valid DQS output and returned to HI-Z after this finishing a burst operation. It is
also driven low shortly after a write command is received and returned to HI-Z shortly after the last data strobe
transition is received. Whenever the device is in standby, the signal is HI-Z. DQS is intended to enable an
external data switch. QFC can be enabled or disabled through EMRS control.
QFC timing on Read operation
QFC on reads is enabled coincident with the start of DQS preamble, and disabled coincident with the end
of DQS postamble
CL = 2, BL = 2
0
1
2
3
4
5
6
7
8
CK
CK
Read
Command
DQS
DQS’
QFC
Dout 0 Dout 1
Hi-Z
tQPST
t
QPRE
Figure 26. QFC timing on read operation
V58C2128(804/404/164)S Rev. 1.6 March 2002
25
MOSEL [ MOSEL VITELIC, CORP ]
