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V58C2128804S 参数 Datasheet PDF下载

V58C2128804S图片预览
型号: V58C2128804S
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能2.5伏128兆位的DDR SDRAM [HIGH PERFORMANCE 2.5 VOLT 128 Mbit DDR SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 59 页 / 922 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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V58C2128(804/404/164)S  
Self Refresh  
A self refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising  
edge of the clock (CK). Once the self refresh command is initiated, CKE must be held low to keep the device  
in self refresh mode. During the self refresh operation, all inputs except CKE are ignored. The clock is inter-  
nally disabled during self refresh operation to reduce power consumption. The self refresh is exited by sup-  
plying stable clock input before returning CKE high, asserting deselect or NOP command and then asserting  
CKE high for longer than t  
after self refresh exit.  
for locking of DLL. The auto refresh is required before self refresh entry and  
SREX  
• •  
CK, CK  
• •  
• •  
• •  
Stable Clock  
NOP  
Self  
Refresh  
Auto  
Refresh  
Command  
• •  
• •  
CKE  
• •  
tSREX  
Power Down Mode  
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down  
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit are gated off to reduce power  
consumption. All banks should be in idle state prior to entering the precharge power down mode and CKE  
should be set high at least 1tck+tIS prior to row active command. During power down mode, refresh opera-  
tions cannot be performed, therefore the device cannot remain in power down mode longer than the refresh  
period (t  
) of the device.  
REF  
CK, CK  
• •  
• •  
precharge  
Precharge  
power  
down  
power  
down  
Exit  
• •  
• •  
Precharge  
Active  
NOP  
Read  
Command  
CKE  
Entry  
• •  
• •  
Active  
power down  
Entry  
Active  
power down  
Exit  
V58C2128(804/404/164)S Rev. 1.6 March 2002  
24  
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