V58C2128(804/404/164)S
NOTE: (continued)
t
Row Activating: Starts with registration of an ACTIVE command and ends when RCD is
t
met. Once RCD is met, the bank will be in the “row active” state.
Read w/Auto-Precharge Enabled: Starts with registration of a READ command with AUTO PRECHARGE
t
t
enabled and ends when RP has been met. Once RP is met, the bank will
be in the idle state.
Write w/Auto-Precharge Enabled: Starts with registration of a WRITE command with AUTO PRECHARGE
t
t
enabled and ends when RP has been met. Once RP is met, the bank will
be in the idle state.
5. The following states must not be interrupted by any executable command; DESELECT or NOP commands must be
applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
t
t
RC is met. Once RFC is met, the DDR SDRAM will be in the “all banks
idle” state.
Accessing Mode Register: Starts with registration of a MODE REGISTER SET command and ends
t
t
when MRD has been met. Once MTC is met, the DDR SDRAM will be in
the “all banks idle” state.
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when
t
t
RP is met. Once RP is met, all banks will be in the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle and no bursts are in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with AUTO PRECHARGE
enabled and READs or WRITEs with AUTO PRECHARGE disabled.
11. Requires appropriate DM masking.
V58C2128(804/404/164)S Rev. 1.6 March 2002
29
MOSEL [ MOSEL VITELIC, CORP ]
