Preliminary Information
MT9076
Bit
Name
Functional Description
7
FEO
Framing Bit Error Counter Overflow Interrupt. When unmasked this interrupt bit goes
high whenever the framing bit error counter changes from FFH to 00H. Reading this
register clears this bit.
6
5
4
3
2
1
0
CRCO
OOFO
COFAO
LCVO
CRC-6 Error Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the CRC-6 error counter changes from FFH to 00H. Reading this register clears
this bit.
Out Of Frame Counter Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the out of frame counter changes state from changes from FFH to 00H. Reading
this register clears this bit.
Change of Frame Alignment Counter Overflow Interrupt. When unmasked this interrupt
bit goes high whenever the change of frame alignment counter changes from FFH to 00H.
Reading this register clears this bit.
Line Code Violation Counter Overflow Interrupt. When unmasked this interrupt bit goes
high whenever the line code violation counter changes from FFH to 00H. Reading this
register clears this bit.
PRBSO
Psuedo Random Bit Sequence Error Counter Overflow Interrupt. When unmasked this
interrupt bit goes high whenever the PRBS error counter changes from FFH to 00H.
Reading this register clears this bit.
PRBSMFO Psuedo Random Bit Sequence Multiframe Counter Overflow Interrupt. When
unmasked this interrupt bit goes high whenever the multiframe counter attached to the
PRBS error counter overflows. FFH to 00H. 1 - unmasked, 0 - masked.
MFOOFO Multiframes Out Of Sync Overflow Interrupt. When unmasked this interrupt bit goes high
whenever the multiframes out of frame counter changes from FFH to 00H. Reading this
register clears this bit.
Table 76 - Interrupt Word Two
(Page 4, Address 1DH) (T1)
85
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