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MT9076 参数 Datasheet PDF下载

MT9076图片预览
型号: MT9076
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1 3.3V单芯片收发器 [T1/E1/J1 3.3V Single Chip Transceiver]
分类和应用:
文件页数/大小: 160 页 / 413 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT9076  
Preliminary Information  
Bit  
Name  
Functional Description  
7
FEI  
Framing Bit Error Interrupt. When unmasked this interrupt bit goes high whenever an  
erroneous framing bit is detected (provided the circuit is in terminal frame sync). Reading this  
register clears this bit.  
6
5
4
CRCI  
YELI  
CRC-6 Error Interrupt. When unmasked this interrupt bit goes high whenever a local CRC-6  
error occurs. Reading this register clears this bit.  
Yellow Alarm Interrupt. When unmasked this interrupt bit goes high upon detection of a  
yellow alarm. Reading this register clears this bit.  
COFAI Change of Frame Alignment Interrupt. When unmasked this interrupt bit goes high  
whenever a change of frame alignment occurs after a reframe. Reading this register clears  
this bit.  
3
2
LCVI  
Line Code Violation Interrupt. When unmasked this interrupt bit goes high whenever a line  
code violation (excluding B8ZS encoding) is encountered. Reading this register clears this bit.  
PRBSI Psuedo Random Bit Sequence Error Interrupt. When unmasked this interrupt bit goes high  
upon detection of an error with a channel selected for PRBS testing. Reading this register  
clears this bit.  
1
0
PDVI  
Pulse Density Violation Interrupt. When unmasked this interrupt bit goes high whenever, in  
the absense of B8ZS encoding, a sequence of 16 consecutive zeros is received on the line, or  
the incoming pulse density is less than N ones in a time frame of 8(N+1) where N = 1 to 23. In  
the case of B8ZS coding, the interrupt is set upon detection of 8 consecutive zeros. Reading  
this register clears this bit.  
- - -  
Unused.  
Table 75 - Interrupt Word One  
(Page 4, Address 1CH) (T1)  
84  
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