Preliminary Information
MT9076
22.0 HDLC Control and Status (Page B for HDLC0, Page C for HDLC1 and Page D
for HDLC2)
Register
Address
Function
Control (Write/Verify)
Status (Read)
10H(Table 157)
11H(Table 158)
Address Recognition 1
Address Recognition 2
TX FIFO
- --
- --
ADR16-10,A1EN
ADR26-20, A2EN
BIT7-0
12H (Table159/160)
13H(Table 161)
RX FIFO
- --
HDLC Control 1
ADREC, RxEN, TxEN, EOP, FA, Mark-
idle, TR, FRUN
14H(Table 162)
15H(Table 163)
16H(Table 164)
- --
HDLC Status
INTGEN, Idle-Chan, RQ9, RQ8,
TxSTAT2, TxSTAT1, RxSTAT2, RxSTAT1
HDLC Control 2
Interrupt Mask
- --
- --
INTSEL, CYCLE, TxCRCI, SEVEN,
RxFRST, TxFRST
GaIM, RxEOPIM, TxEOPIM, RxFEIM,
TxFLIM, FA:TxUNDERIM, RxFFIM,
RxOVFIM
17H(Table 165)
- --
Interrupt Status (*)
Ga, RxEOP, TxEOP, RxFE, TxFL,
FA:TxUNDER, RxFF, RxOVF
18H(Table 166)
19H(Table 167)
1AH(Table 168)
1BH(Table 169)
- --
- --
Rx CRC MSB
Rx CRC LSB
- --
CRC15-CRC8
CRC7-CRC0
TxCNT7-0
Low TX byte count
Test Control
- --
HRST, RTLOOP, CRCTST, FTST,
ARTST, HLOOP
1CH(Table 170)
1DH(Table 171)
1EH(Table 172)
1FH(Table 173)
- --
Test Status
RxCLK, TxCLK, VCRC, VADDR
RSV, RFD2-0,RSV, TFD2-0
RSV, RFFS2-0, RSV, TFLS2-0
TxCNT15-8
HDLC Control 3
HDLC Control 4
- --
- --
- --
Extended TX byte
count
Table 156 - HDLC0, HDLC1, HDLC2 Control and Status (Page B, C, D)
127
MITEL [ MITEL NETWORKS CORPORATION ]
