MT8931C
with zeros in the B and D-channel and
activation bit (A-bit) set to zero.
the
the E bit. Any zero found on the D-echo channel will
reset the priority counter.
There are two classes of priority within the SNIC,
one user accessible and the other being strictly
internal. The user accessible priority selects the
class of operation and has precedence over the
internal priority. The latter (internal priority), will
select the level of priority within each class (i.e., the
internal priority is a subsection of the user accessible
priority).
User accessible priority selects the
terminal count as 8/9 or 10/11 consecutive ones on
the E-bit (8 being high priority while 10 being low
priority). The internal priority selects the terminal
between 8 or 9 for high class and 10 or 11 for low
class. The first terminal equipment to attain the E-bit
priority count will immediately take control of the
D-channel by sending the opening flag. If more than
one terminal has the same priority, all but one of
them will eventually detect a collision. The TEs that
detect a collision will immediately stop trans-mitting
on the D-channel, generate an interrupt through the
Dcoll bit, reset the DCack bit on the next frame
pulse, and restart the counting process.
The
remainder of the packet in the Tx FIFO is ignored.
4) As soon as the TE synchronizes to Info2, it
responds with a valid S-Bus frame with data in
the B1, B2 and D-channel (Info3).
5) The NT will then transmit a valid frame with data
in the B1, B2 and D-channel. It will also set the
activation bit (A) to binary one once
synchronization to Info3 is achieved.
If the NT wishes to initiate the activation, steps 2 and
3 are ignored and the NT starts sending Info2. To
initiate a deactivation, either end begins to send
Info0 (Idle line).
D-channel Priority Mechanism
The SNIC contains a hardware priority mechanism
for D-channel contention resolution.
All TEs
connected in a point-to-multipoint configuration are
allocated the D-channel using a systematic
approach.
Allocation of the D-channel is
accomplished by monitoring the D-echo channel
(E-bit) and incrementing the D-channel priority
counter with every consecutive one echoed back in
0 - 1 Km
NT
T
R
T
R
TE
NT is operating in adaptive timing
TR is the line termination resistor = 100
Ω
Figure 8 - Point-to-Point Configuration
100 m for 75
Ω
impedance cable and 200 m for 150
Ω
impedance cable
100 - 200 m
NT
T
R
T
0 - 10 m R
TE
NT is operating in fixed timing
TR is the line termination resistor = 100
Ω
TE
TE
TE
TE
TE
TE
TE
Figure 9 - Short Passive Bus Configuration, up to 8 TEs can be supported
0-500 m
NT
T
R
0-50 m
0 - 10 m
T
R
TE
TE
TE
TE
TE
TE
TE
TE
NT is operating in adaptive timing
TR is the line termination resistor = 100
Ω
Figure 10 - Extended Passive Bus Configuration, up to 8 TEs can be supported
9-79
MITEL [ MITEL NETWORKS CORPORATION ]
