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MH89760BS 参数 Datasheet PDF下载

MH89760BS图片预览
型号: MH89760BS
PDF下载: 下载PDF文件 查看货源
内容描述: ST- BUS⑩系列T1 / ESF成帧器和接口的初步信息 [ST-BUS⑩ FAMILY T1/ESF Framer & Interface Preliminary Information]
分类和应用: 电信集成电路光电二极管
文件页数/大小: 38 页 / 848 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
 浏览型号MH89760BS的Datasheet PDF文件第17页浏览型号MH89760BS的Datasheet PDF文件第18页浏览型号MH89760BS的Datasheet PDF文件第19页浏览型号MH89760BS的Datasheet PDF文件第20页浏览型号MH89760BS的Datasheet PDF文件第22页浏览型号MH89760BS的Datasheet PDF文件第23页浏览型号MH89760BS的Datasheet PDF文件第24页浏览型号MH89760BS的Datasheet PDF文件第25页  
Preliminary Information  
MH89760B  
T1 Interface  
Switch Matrix  
MT8980  
Digital Line Interface  
MH89760B  
MT8910  
STo1  
STi0  
DSTi  
OUTA  
DSTo  
DSTi  
Equal-  
izer  
DSTo  
STi1  
STo2  
STi3  
STo0  
Z
T
OUTB  
RxR  
CSTi0  
CSTo  
C4i  
F0i  
STo3  
CSTi1  
RxT  
C2i  
F0i  
µP  
E8Ko  
C1.5i  
D-Channel Processing  
MT8952  
MT8952  
DSTo  
MT8941  
MT8910  
DSTo  
DSTi  
DSTi  
DSTo  
DSTi  
F0i  
C1.5  
Z
T
µP  
µP  
F0o  
C2o  
C4o  
MT8952  
E8Ko  
DSTo  
DSTi  
µP  
Figure 14 - ISDN Voice Data Channel Bank  
5. Digital Access Cross Connect System  
(DACS)  
To control and monitor the MT8910s and the T1  
interface the switch matrix operates some of its input  
and output streams in message mode. This enables  
the system to control all of the functions of the  
MT8910s and the T1 interface through the Control  
ST-BUS points, (CSTi/o).  
The Digital Access Cross Connect System (DACS) is  
a T1 switch with 127 T1 lines as input and output  
plus one T1 line that is reserved for test and  
maintenance purposes. A DACS is capable of  
switching any input channel on any T1 trunk to any  
output channel on any T1 trunk.  
Clock synchronization is done by the MT8941.  
Phase-locked loop # 2 generates ST-BUS clocks that  
are synchronized to the extracted 8kHz output from  
the T1 interface. Phase-locked loop #1 generates  
the transmit T1 clock synchronized to the ST-BUS  
clocks, which are synchronized to the extracted T1  
clock. This scheme will also allow the system to  
operate in a loop timed mode.  
There are four main blocks in Figure 15, the T1  
interfaces, the switch matrix, the control matrix, and  
the clock generator. The digital trunk interface is  
made up of the MH89760B plus the additional  
components required to interface to the transmission  
line. The MH89760B handles all of the required  
transmit and receive data formatting, and converts  
the 1.544 MHz serial stream into ST-BUS format so  
that it can be routed through the MT8980  
synchronous switch matrix.  
With appropriate multiplexing a single D channel  
processor can handle all 23 2B+D interfaces. If both  
B channels on all 24 lines are going to be used then  
it would be necessary to use two T1 trunk interfaces.  
4-75  
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