‡
Pre lim in a ry
MT9V012 - 1/6-In ch VGA CMOS Dig it a l Im a g e Se n so r
Ou t p u t Da t a Fo rm a t (De fa u lt Mo d e )
Ta b le 3: Fra m e Tim e
De fa u lt Tim in g
Pa ra m e t e r
Na m e
Eq u a t io n
a t 27 MHz
HBLANK_REG
Horizontal Blanking Register Reg0x07 if Reg0xC8[0] = 0
0xF4 = 244 pixels
Reg0x05 if Reg0xC8[0] = 1
VBLANK_REG
Vertical Blanking Register
Reg0x8 if Reg0xC8[1] = 0
Reg0x6 if Reg0xC8[1] = 1
0x1D = 29 rows
PIXCLK_PERIOD Pixel Clock Period
Reg0x0A[2:0] * 2
1 pixel clock
= 2 master
= 37.04ns
S
Skip Factor
For skip 2x mode: S = 2
For skip 4x mode: S = 4
otherwise, S = 1
1
A
Active Data Time
Frame Start/End Blanking
Horizontal Blanking
Row Time
(Reg0x04/S) * PIXCLK_PERIOD
640 pixel clocks
= 1,280 master
= 47.41µs
P
6 * PIXCLK_PERIOD
6 pixel clocks
= 12 master
= 0.44µs
Q
HBLANK_REG * PIXCLK_PERIOD
244 pixel clocks
= 488 master
= 18.07µs
A + Q
V
((Reg0x04/S) + HBLANK_REG) * PIXCLK_PERIOD 884 pixel clocks
= 1,768 master
= 65.48µs
Vertical Blanking
VBLANK_REG * (A + Q) + (Q - 2*P)
(Reg0x03/S) * (A + Q) - (Q - 2*P)
((Reg0x03/S) + VBLANK_REG) * (A + Q)
25,868 pixel clocks
= 51,736 master
= 1.91ms
Nrows * (A+Q) Frame Valid Time
424,088 pixel clocks
= 848,176 master
= 31.41ms
F
Total Frame Time
449,956 pixel clocks
= 899,912 master
= 33.33ms
The sensor timing (Table 3) is shown in terms of pixel clock and master clock cycles (see
Figure 8 on page 11). The recommended master clock frequency is 27 MHz. The vertical
blanking and total frame time equations assume that the number of integration rows
(Reg0x09) is less than the number of active rows, plus blanking rows (Reg0x03 +
VBLANK_REG). If this is not the case, the number of integration rows must be used
instead, to determine the frame time, as shown in Table 4.
Ta b le 4: Fra m e —Lo n g In t e g ra t io n Tim e
Pa ra m e t e r
Na m e
Eq u a t io n (m a st e r clo ck)
De fa u lt Tim in g
V’
Vertical Blanking (long integration
time)
(Reg0x09 – (Reg0x03)/S)) * (A + Q) + (Q - 2*P) 25,868 pixel clocks
= 51,736 master
= 1.91ms
F’
Total Frame Time (long integration
time)
(Reg0x09) * (A + Q)
449,956 pixel clocks
= 899,912 master
= 33.33ms
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
12
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