ADVANCE
4 MEG x 8, 4 MEG x 9, 2 MEG x 18, 1 MEG x 36
1.8V VDD, HSTL, QDRIIb2 SRAM
4 MEG x 8 BALL ASSIGNMENT (TOP VIEW)
165-BALL FBGA
1
2
3
SA
4
5
6
7
8
9
SA
10
SA
11
CQ
Q3
D3
NC
Q2
NC
NC
ZQ
D1
NC
Q0
D0
NC
NC
TDI
VSS/SA1
NC
NW1#2
NC/SA4
SA
NC/SA3
NW0#5
SA
A
B
C
D
E
CQ#
NC
W#
K#
K
R#
NC
NC
NC
Q4
NC
Q5
VDDQ
NC
NC
D6
SA
SA
NC
NC
NC
NC
NC
NC
VDDQ
NC
NC
NC
NC
NC
NC
SA
NC
NC
NC
D2
NC
NC
D4
VSS
SA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SA
C
VSS
NC
VSS
VSS
VSS
VSS
NC
NC
NC
D5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
F
NC
VDD
VDD
VDD
VDD
VDD
VSS
VDD
VDD
VDD
VDD
VDD
VSS
NC
NC
VREF
Q1
NC
NC
NC
NC
NC
TMS
G
H
J
NC
DLL#
NC
VREF
NC
NC
Q6
NC
D7
K
L
NC
NC
M
N
P
NC
NC
NC
Q7
SA
VSS
VSS
NC
VSS
SA
SA
VSS
NC
NC
TCK
SA
SA
SA
SA
R
TDO
SA
SA
C#
SA
SA
NOTE:
1. Expansion address: 2A for 72Mb
2. NW1# controls writes to D4:D7
3. Expansion address: 7A for 144Mb
4. Expansion address: 5B for 288Mb
5. NW0# controls writes to D0:D3
36Mb: 1.8V VDD, HSTL, QDRIIb2 SRAM
MT54W2MH18B_A.fm - Rev 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology Inc.
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MICRON [ MICRON TECHNOLOGY ]
