4 MEG x 4
FPM DRAM
FAST-PAGE-MODE EARLY WRITE CYCLE
t
t
RP
RASP
V
V
IH
IL
RAS#
CAS#
t
t
t
t
CSH
PC
RSH
CAS
t
t
t
t
t
t
t
CRP
RCD
CAS
CP
CAS
CP
CP
V
V
IH
IL
t
AR
t
RAD
t
t
t
t
t
t
t
t
CAH
ASR
RAH
ASC
CAH
ASC
CAH
ASC
V
V
IH
IL
ADDR
ROW
COLUMN
COLUMN
COLUMN
ROW
t
t
t
t
t
CWL
CWL
CWL
WCH
WP
t
t
t
t
t
t
t
WCS
WCS
WCH
WP
WCS
WCH
WP
V
V
IH
IL
WE#
t
t
t
WCR
DH
RWL
t
t
t
t
t
DS
DS
DH
DS
DH
V
V
IOH
IOL
DQ
VALID DATA
VALID DATA
VALID DATA
V
V
IH
IL
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
38
0
MAX
MIN
45
0
MAX
UNITS
ns
SYMBOL
MIN
9
MAX
MIN
12
10
60
14
40
15
15
10
45
0
MAX
UNITS
ns
t
t
AR
RAD
t
t
ASC
ns
RAH
9
ns
t
t
ASR
0
0
ns
RASP
50
11
30
13
13
8
125,000
125,000
ns
t
t
CAH
8
10
10
10
5
ns
RCD
ns
t
t
CAS
8
10,000
10,000
ns
RP
ns
t
t
CP
8
ns
RSH
ns
t
t
CRP
5
ns
RWL
ns
t
t
CSH
38
8
45
10
10
0
ns
WCH
ns
t
t
CWL
ns
WCR
38
0
ns
t
t
DH
8
ns
WCS
ns
t
t
DS
0
ns
WP
5
5
ns
t
PC
20
25
ns
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2000, Micron Technology, Inc.
13
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