4 MEG x 4
FPM DRAM
EARLY WRITE CYCLE
t
RC
t
t
RP
RAS
V
V
IH
IL
RAS#
CAS#
t
CSH
t
RSH
t
t
t
CRP
RCD
CAS
V
V
IH
IL
t
AR
t
t
RAD
RAH
t
t
ASC
t
ASR
CAH
V
V
IH
IL
ADDR
ROW
COLUMN
ROW
t
CWL
t
t
t
t
RWL
WCR
WCH
WP
t
WCS
V
V
IH
IL
WE#
DQ
t
t
DS
DH
V
IOH
IOL
VALID DATA
V
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
38
0
MAX
MIN
45
0
MAX
UNITS
ns
SYMBOL
MIN
9
MAX
MIN
10
60
104
14
40
15
15
10
45
0
MAX
UNITS
ns
t
t
AR
RAH
t
t
ASC
ns
RAS
50
84
11
30
13
13
8
10,000
10,000
ns
t
t
ASR
0
0
ns
RC
ns
t
t
CAH
8
10
10
5
ns
RCD
ns
t
t
CAS
8
10,000
10,000
ns
RP
ns
t
t
CRP
5
ns
RSH
ns
t
t
CSH
38
8
45
10
10
0
ns
RWL
ns
t
t
CWL
ns
WCH
ns
t
t
DH
8
ns
WCR
38
0
ns
t
t
DS
0
ns
WCS
ns
t
t
RAD
9
12
ns
WP
5
5
ns
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2000, Micron Technology, Inc.
10
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