4 MEG x 4
FPM DRAM
RAS#-ONLY REFRESH CYCLE
(OE# and WE# = DON’T CARE)
t
RC
t
t
RP
RAS
V
V
IH
IL
RAS#
CAS#
t
t
CRP
RPC
V
V
IH
IL
t
t
RAH
ASR
V
V
IH
IL
ADDR
DQ
ROW
ROW
V
OH
OL
OPEN
V
CBR REFRESH CYCLE
(Addresses and OE# = DON’T CARE)
t
t
t
t
RAS
RP
RAS
NOTE 1
RP
V
V
IH
IL
RAS#
t
t
RPC
CP
t
t
t
RPC
t
t
CHR
CSR
CHR
CSR
V
V
IH
IL
CAS#
DQ
V
OH
OL
OPEN
V
t
t
t
t
WRH
WRP
WRH
WRP
V
V
IH
IL
WE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
MAX
MIN
0
MAX
UNITS
SYMBOL
MIN
50
84
30
5
MAX
MIN
60
MAX
UNITS
ns
t
t
ASR
0
8
8
5
5
9
ns
ns
ns
ns
ns
ns
RAS
10,000
10,000
t
t
CHR
10
10
5
RC
104
40
ns
t
t
CP
RP
ns
t
t
CRP
RPC
5
ns
t
t
CSR
5
WRH
8
10
ns
t
t
RAH
10
WRP
8
10
ns
NOTE: 1. End of CBR REFRESH cycle.
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2000, Micron Technology, Inc.
16
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