4 MEG x 4
FPM DRAM
FAST-PAGE-MODE READ EARLY WRITE CYCLE
(Pseudo READ-MODIFY-WRITE)
t
t
RASP
RP
V
V
IH
IL
RAS#
CAS#
t
RSH
t
t
CSH
AR
PC
t
t
t
t
t
t
CP
CRP
RCD
CAS
CP
CAS
V
V
IH
IL
t
t
RAD
RAH
t
t
CAH
t
t
t
t
CAH
ASC
ASR
ASC
V
V
IH
IL
ADDR
ROW
COLUMN
COLUMN
t
ROW
CWL
t
t
RCS
RWL
t
t
WP
t
WCS
WCH
V
V
IH
IL
WE#
DQ
t
CAC
NOTE 1
t
t
t
t
DH
CLZ
OFF
DS
V
VALID
DATA
OH
OL
VALID DATA
OPEN
V
t
AA
t
RAC
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
MAX
MIN
MAX
UNITS
ns
SYMBOL
MIN
0
MAX
MIN
0
MAX
UNITS
ns
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AA
25
30
OFF
PC
12
15
t
AR
38
0
45
0
ns
20
25
ns
t
ASC
ns
RAC
RAD
RAH
50
60
ns
t
ASR
0
0
ns
9
9
12
10
60
14
0
ns
t
CAC
13
15
ns
ns
t
CAH
8
8
10
10
0
ns
RASP
RCD
RCS
RP
50
11
0
125,000
125,000
ns
t
CAS
10,000
10,000
ns
ns
t
CLZ
0
ns
ns
t
CP
8
10
5
ns
30
13
13
8
40
15
15
10
0
ns
t
CRP
5
ns
RSH
RWL
WCH
WCS
WP
ns
t
CSH
38
8
45
10
10
0
ns
ns
t
CWL
ns
ns
t
DH
8
ns
0
ns
t
DS
0
ns
5
5
ns
NOTE: 1. Do not drive data prior to tristate.
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2000, Micron Technology, Inc.
15
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