64Mb : x4, x8, x16
SDRAM
TRUTH TABLE 4 – CURRENT STATE BANK n , COMMAND TO BANK m
(Notes: 1-6; notes appear below and on next page)
CURRENT STATE CS# RAS# CAS# WE# COMMAND (ACTION)
NOTES
Any
H
L
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
X
L
X
H
X
H
L
X
H
X
H
H
L
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (Select and activate row)
Idle
Row
Activating,
Active, or
Precharging
Read
H
H
L
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
7
7
L
H
H
L
L
L
H
H
L
ACTIVE (Select and activate row)
(Auto
H
H
L
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
7, 10
7, 11
9
Precharge
Disabled)
Write
L
H
H
L
L
L
H
H
L
ACTIVE (Select and activate row)
(Auto
H
H
L
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
7, 12
7, 13
9
Precharge
Disabled)
Read
L
H
H
L
L
L
H
H
L
ACTIVE (Select and activate row)
(With Auto
Precharge)
H
H
L
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
7, 8, 14
7, 8, 15
9
L
H
H
L
L
Write
L
H
H
L
ACTIVE (Select and activate row)
(With Auto
Precharge)
H
H
L
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
7, 8, 16
7, 8, 17
9
L
H
L
t
NOTE: 1. This table applies when CKE was HIGH and CKE is HIGH (see Truth Table 2) and after XSR has been met (if the
n-1
n
previous state was self refresh).
2. This table describes alternate bank operation, except where noted; i.e., the current state is for bank n and the
commands shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given
command is allowable). Exceptions are covered in the notes below.
3. Current state definitions:
t
Idle: The bank has been precharged, and RP has been met.
Row Active: A row in the bank has been activated, and RCD has been met. No data bursts/accesses and
t
no register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled, and has not yet terminated
or been terminated.
Writ e : A WRITE burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
Read w/Auto
Precharge Enabled: Starts with registration of a READ command with auto precharge enabled, and ends when
t
t
RP has been met. Once RP is met, the bank will be in the idle state.
Write w/Auto
Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled, and ends when
t
t
RP has been met. Once RP is met, the bank will be in the idle state.
(Continued on next page)
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2003, Micron Technology, Inc.
30
MICRON [ MICRON TECHNOLOGY ]
