64Mb : x4, x8, x16
SDRAM
COMMAND INHIBIT
The COMMAND INHIBIT function prevents new
com m ands from being executed by the SDRAM, re-
gardless of whether the CLK signal is enabled. The
SDRAM is effectively deselected. Operations already
in progress are not affected.
precharge is selected, the row being accessed will be
precharged at the end of the WRITE burst; if auto
precharge is not selected, the row will rem ain open for
subsequent accesses. Input data appearing on the DQs
is written to the m em ory array subject to the DQM in-
put logic level appearing coincident with the data. If a
given DQM signal is registered LOW, the correspond-
ing data will be written to m em ory; if the DQM signal is
registered HIGH, the corresponding data inputs will
be ignored, and a WRITE will not be executed to that
byte/ colum n location.
NO OPERATION (NOP)
The NO OPERATION (NOP) com m and is used to
perform a NOP to an SDRAM which is selected (CS# is
LOW). This prevents unwanted com m ands from being
registered during idle or wait states. Operations already
in progress are not affected.
PRECHARGE
LOAD MODE REGISTER
The PRECHARGE com m and is used to deactivate
the open row in a particular bank or the open row in all
banks. The bank(s) will be available for a subsequent
row access a specified tim e (tRP) after the PRECHARGE
com m and is issued. Input A10 determ ines whether
one or all banks are to be precharged, and in the case
where only one bank is to be precharged, inputs BA0,
BA1 select the bank. Otherwise BA0, BA1 are treated as
“Don’t Care.” Once a bank has been precharged, it is in
the idle state and m ust be activated prior to any READ
or WRITE com m ands being issued to that bank.
The mode register is loaded via inputs A0-A11. See
mode register heading in the Register Definition section.
The LOAD MODE REGISTER command can only be is-
sued when all banks are idle, and a subsequent execut-
able command cannot be issued until tMRD is met.
ACTIVE
The ACTIVE com m and is used to open (or activate)
a row in a particular bank for a subsequent access. The
value on the BA0, BA1 inputs selects the bank, and the
address provided on inputs A0-A11 selects the row.
This row rem ains active (or open) for accesses until a
PRECHARGE com m an d is issu ed to th at b an k.
A PRECHARGE com m and m ust be issued before open-
ing a different row in the sam e bank.
AUTO PRECHARGE
Auto precharge is a feature which perform s the
sam e in d ivid u al-b an k PRECHARGE fu n ction d e-
scribed above, without requiring an explicit com m and.
This is accom plished by usin g A10 to en able auto
precharge in conjunction with a specific READ or WRITE
com m and. A precharge of the bank/ row that is ad-
dressed with the READ or WRITE com m and is auto-
m atically perform ed upon com pletion of the READ or
WRITE burst, except in the full-page burst m ode, where
auto precharge does not apply. Auto precharge is non-
persistent in that it is either enabled or disabled for
each individual READ or WRITE com m and.
Auto precharge ensures that the precharge is initi-
ated at the earliest valid stage within a burst. The user
m ust not issue another com m and to the sam e bank
until the precharge tim e (tRP) is com pleted. This is
determ ined as if an explicit PRECHARGE com m and
was issued at the earliest possible tim e, as described
for each burst type in the Operation section of this data
sh eet.
READ
The READ com m and is used to initiate a burst read
access to an active row. The value on the BA0, BA1
inputs selects the bank, and the address provided on
inputs A0-A9 (x4), A0-A8 (x8), or A0-A7 (x16) selects the
starting colum n location. The value on input A10 de-
term ines whether or not auto precharge is used. If auto
precharge is selected, the row being accessed will be
precharged at the en d of the READ burst; if auto
precharge is not selected, the row will rem ain open for
subsequent accesses. Read data appears on the DQs
subject to the logic level on the DQM inputs two clocks
earlier. If a given DQM signal was registered HIGH, the
corresponding DQs will be High-Z two clocks later; if
the DQM signal was registered LOW, the DQs will pro-
vide valid data.
WRITE
BURST TERMINATE
The WRITE com m and is used to initiate a burst write
access to an active row. The value on the BA0, BA1
inputs selects the bank, and the address provided on
inputs A0-A9 (x4), A0-A8 (x8), or A0-A7 (x16) selects the
starting colum n location. The value on input A10 de-
term ines whether or not auto precharge is used. If auto
The BURST TERMINATE com m and is used to trun-
cate either fixed-length or full-page bursts. The m ost
recently registered READ or WRITE com m and prior to
the BURST TERMINATE com m and will be truncated,
as shown in the Operation section of this data sheet.
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
Micron Technology, Inc., reservesthe right to change productsor specificationswithout notice.
©2003, Micron Technology, Inc.
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