256Mb: x4, x8, x16 SDRAM
PRECHARGE Operation
Figure 44: Single READ With Auto Precharge
T0
T1
T2
T3
T4
T5
T6
T7
t
t
CL
CK
CLK
t
CH
t
t
CKS
CKH
CKE
t
t
CMS
CMH
Command
ACTIVE
NOP
READ
NOP
NOP
NOP
NOP
ACTIVE
t
t
CMS CMH
DQM
t
AS
t
AH
Row
Column m
Row
Address
t
AS
t
AH
Enable auto precharge
Row
Row
A10
t
AS
t
AH
BA0, BA1
Bank
Bank
Bank
t
t
OH
AC
DOUT
DQ
t
LZ
t
t
RCD
CL = 2
RP
t
RAS
t
RC
Don’t Care
Undefined
1. For this example, BL = 1 and CL = 2.
Note:
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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