512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM
Tru t h Ta b le s
5. The following states must not be interrupted by any executable command; COMMAND
INHIBIT or NOP commands must be applied on each positive clock edge during these states.
Refreshing:
Starts with registration of an AUTO REFRESH command and ends
when RFC is met. Once RFC is met, the SDRAM will be in the all
banks idle state.
t
t
Accessing mode
register:
Starts with registration of a LOAD MODE REGISTER command and
ends when MRD has been met. Once MRD is met, the Mobile
SDRAM will be in the all banks idle state.
t
t
Precharging all:
Starts with registration of a PRECHARGE ALL command and ends
when RP is met. Once RP is met, all banks will be in the idle state.
t
t
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. Does not affect the state of the bank and acts as a NOP to that bank.
9. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
auto precharge enabled and READs or WRITEs with auto precharge disabled.
10. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid
state for precharging.
11. This command is BURST TERMINATE when CKE is HIGH.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
43
©2005 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
