512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM
Op e ra t io n s
Fig u re 32: READ Wit h Au t o Pre ch a rg e In t e rru p t e d b y a WRITE
T0
T1
T2
T3
T4
T5
T6
T7
CLK
READ - AP
BANK n
WRITE - AP
BANK m
NOP
NOP
NOP
NOP
NOP
NOP
COMMAND
Page
Active
READ with Burst of 4
Interrupt Burst, Precharge
t
Idle
WR - BANK m
BANK n
t
RP - BANK
n
Internal
States
Write-Back
Page Active
WRITE with Burst of 4
BANK m
BANK n,
COL a
BANK m,
COL d
ADDRESS
1
DQM
D
OUT
DIN
d
D
d + 1
IN
D
d + 2
IN
DIN
d + 3
DQ
a
CL = 3 (bank n)
DON’T CARE
Notes: 1. DQM is HIGH at T2 to prevent DOUT a + 1 from contending with DIN d at T4.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
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