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MT48H16M32LFCM-75L 参数 Datasheet PDF下载

MT48H16M32LFCM-75L图片预览
型号: MT48H16M32LFCM-75L
PDF下载: 下载PDF文件 查看货源
内容描述: 512MB :梅格32 ×16 , 16兆×32移动SDRAM [512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM]
分类和应用: 内存集成电路动态存储器时钟
文件页数/大小: 73 页 / 2407 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM  
Tru t h Ta b le s  
Tru t h Ta b le s  
Ta b le 6:  
Tru t h Ta b le – CKE  
Notes: 1–4  
CKEn -1  
CKEn  
Cu rre n t St a t e  
Co m m a n d n  
Act io n n  
No t e s  
L
L
H
L
Power-Down  
Self refresh  
X
Maintain power-down  
Maintain self refresh  
Maintain clock suspend  
Maintain deep power-down  
Exit power-down  
X
Clock suspend  
Deep power-down  
Power-Down  
X
X
COMMAND INHIBIT or NOP  
X
5
6
5
7
8
L
H
H
Deep power-down  
Self refresh  
Exit deep power-down  
Exit self refresh  
COMMAND INHIBIT or NOP  
X
Clock suspend  
All banks idle  
All banks idle  
All banks idle  
Reading or writing  
Exit clock suspend  
COMMAND INHIBIT or NOP  
BURST TERMINATE  
AUTO REFRESH  
VALID  
Power-Down entry  
Deep power-down entry  
Self refresh entry  
5
Clock suspend entry  
H
Table 8 on page 44  
Notes: 1. CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous  
clock edge.  
2. Current state is the state of the SDRAM immediately prior to clock edge n.  
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result  
of COMMANDn.  
4. All states and sequences not shown are illegal or reserved.  
5. Deep power-down is power savings feature of this Mobile SDRAM device. This command is  
BURST TERMINATE when CKE is HIGH and deep power-down when CKE is LOW.  
6. Exiting power-down at clock edge n will put the device in the all banks idle state in time for  
t
clock edge n + 1 (provided that CKS is met).  
7. Exiting self refresh at clock edge n will put the device in the all banks idle state once XSR is  
t
met. COMMAND INHIBIT or NOP commands should be issued on any clock edges occurring  
t
during the XSR period. A minimum of two NOP commands must be provided during the  
tXSR period.  
8. After exiting clock suspend at clock edge n, the device will resume operation and recognize  
the next command at clock edge n + 1.  
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03  
MT48H32M16LF_1.fm - Rev. H 6/07 EN  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2005 Micron Technology, Inc. All rights reserved.  
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