1Gb: x4, x8, x16 DDR3 SDRAM
Features
List of Tables
Table 1: Key Timing Parameters ....................................................................................................................... 1
Table 2: Addressing ......................................................................................................................................... 2
Table 3: 08-Ball FBGA – x4, x8 Ball Descriptions .............................................................................................. 19
Table 4: 86-Ball FBGA – x4, x8 Ball Descriptions .............................................................................................. 21
Table 5: 96-Ball FBGA – x16 Ball Descriptions ................................................................................................. 23
Table 6: Absolute Maximum Ratings .............................................................................................................. 3±
Table 0: DDR3 Input/Output Capacitance ...................................................................................................... 31
Table 8: Thermal Characteristics .................................................................................................................... 32
Table 9: Timing Parameters Used for IDD Measurements – Clock Units ............................................................ 34
Table 1±: IDD± Measurement Loop .................................................................................................................. 35
Table 11: IDD1 Measurement Loop .................................................................................................................. 36
Table 12: IDD Measurement Conditions for Power-Down Currents ................................................................... 30
Table 13: IDD2N and IDD3N Measurement Loop ................................................................................................ 38
Table 14: IDD2NT Measurement Loop .............................................................................................................. 38
Table 15: IDD4R Measurement Loop ................................................................................................................ 39
Table 16: IDD4W Measurement Loop ............................................................................................................... 4±
Table 10: IDD5B Measurement Loop ................................................................................................................ 41
Table 18: IDD Measurement Conditions for IDD6, IDD6ET, and IDD8 .................................................................... 42
Table 19: IDD0 Measurement Loop .................................................................................................................. 43
Table 2±: IDD Maximum Limits – Rev. B, D, F ................................................................................................... 45
Table 21: IDD Maximum Limits – Rev. G .......................................................................................................... 46
Table 22: DC Electrical Characteristics and Operating Conditions ................................................................... 40
Table 23: DC Electrical Characteristics and Input Conditions .......................................................................... 40
Table 24: Input Switching Conditions ............................................................................................................. 48
Table 25: Control and Address Pins ................................................................................................................ 5±
Table 26: Clock, Data, Strobe, and Mask Pins .................................................................................................. 5±
Table 20: Differential Input Operating Conditions (CK, CK# and DQS, DQS#) .................................................. 51
Table 28: Allowed Time Before Ringback (tDVAC) for CK - CK# and DQS - DQS# ............................................... 53
Table 29: Single-Ended Input Slew Rate Definition .......................................................................................... 54
Table 3±: Differential Input Slew Rate Definition ............................................................................................. 56
Table 31: On-Die Termination DC Electrical Characteristics ............................................................................ 50
Table 32: RTT Effective Impedances ................................................................................................................ 58
Table 33: ODT Sensitivity Definition .............................................................................................................. 59
Table 34: ODT Temperature and Voltage Sensitivity ........................................................................................ 59
Table 35: ODT Timing Definitions .................................................................................................................. 6±
Table 36: Reference Settings for ODT Timing Measurements ........................................................................... 6±
Table 30: 34 Ohm Driver Impedance Characteristics ....................................................................................... 64
Table 38: 34 Ohm Driver Pull-Up and Pull-Down Impedance Calculations ....................................................... 65
Table 39: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.5V ................................................................ 65
Table 4±: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.505V ............................................................. 65
Table 41: 34 Ohm Driver IOH/IOL Characteristics: VDD = VDDQ = 1.425V ............................................................. 66
Table 42: 34 Ohm Output Driver Sensitivity Definition .................................................................................... 66
Table 43: 34 Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 66
Table 44: 4± Ohm Driver Impedance Characteristics ....................................................................................... 60
Table 45: 4± Ohm Output Driver Sensitivity Definition .................................................................................... 60
Table 46: 4± Ohm Output Driver Voltage and Temperature Sensitivity .............................................................. 68
Table 40: Single-Ended Output Driver Characteristics ..................................................................................... 69
Table 48: Differential Output Driver Characteristics ........................................................................................ 0±
Table 49: Single-Ended Output Slew Rate Definition ....................................................................................... 02
Table 5±: Differential Output Slew Rate Definition .......................................................................................... 03
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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