OBSOLETE
2, 4 MEG x 72
NONBUFFERED DRAM DIMMs
RAS#-ONLY REFRESH CYCLE 27
t
RC
t
t
RP
RAS
V
IH
IL
RAS#
CAS#
ADDR
V
t
t
RPC
CRP
V
V
IH
IL
t
t
RAH
ASR
V
V
IH
IL
ROW
ROW
V
V
OH
OL
DQ
OPEN
V
V
IH
IL
WE#
CBR REFRESH CYCLE 27
(Addresses, OE# = DON’T CARE)
t
t
t
t
RAS
RP
RAS
NOTE 1
RP
V
V
IH
IL
RAS#
t
t
RPC
CP
t
t
t
RPC
t
t
CHR
CSR
CHR
CSR
V
V
IH
IL
CAS#
DQ
V
V
OH
OL
OPEN
t
t
t
t
WRH
WRP
WRH
WRP
V
V
IH
IL
WE#
DON’T CARE
UNDEFINED
FAST PAGE MODE AND EDO PAGE MODE
TIMING PARAMETERS
-5*
-6
-5*
-6
SYMBOL
MIN
0
MAX
MIN
0
MAX
UNITS
ns
SYMBOL
MIN
–
MAX
MIN
110
104
40
0
MAX
UNITS
ns
t
t
ASR
RC (FPM)
t
t
CHR
8
10
10
5
ns
RC (EDO)
84
30
–
ns
t
t
CP
8
ns
RP
ns
t
t
CRP
5
ns
RPC (FPM)
ns
t
t
CSR
5
5
ns
RPC (EDO)
5
5
ns
t
t
RAH
9
10
60
ns
WRH
8
10
10
ns
t
t
RAS
50
10,000
10,000
ns
WRP
8
ns
*EDO version only
2, 4 Meg x 72 Nonbuffered DRAM DIMMs
DM60.p65 – Rev. 6/98
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1998, Micron Technology, Inc.
27
MICRON [ MICRON TECHNOLOGY ]
