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M25PX16SOVZM6TP 参数 Datasheet PDF下载

M25PX16SOVZM6TP图片预览
型号: M25PX16SOVZM6TP
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [16-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 65 页 / 1418 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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M25PX16  
Instructions  
If more than 256 bytes are sent to the device, previously latched data are discarded and the  
last 256 data bytes are guaranteed to be programmed correctly within the same page. If less  
than 256 data bytes are sent to device, they are correctly programmed at the requested  
addresses without having any effects on the other bytes of the same page.  
For optimized timings, it is recommended to use the Page Program (PP) instruction to  
program all consecutive targeted bytes in a single sequence versus using several Page  
Program (PP) sequences with each containing only a few bytes (see Table 18: AC  
characteristics).  
Chip Select (S) must be driven High after the eighth bit of the last data byte has been  
latched in, otherwise the Page Program (PP) instruction is not executed.  
As soon as Chip Select (S) is driven High, the self-timed Page Program cycle (whose  
duration is t ) is initiated. While the Page Program cycle is in progress, the Status Register  
PP  
may be read to check the value of the Write In Progress (WIP) bit. The Write In Progress  
(WIP) bit is 1 during the self-timed Page Program cycle, and is 0 when it is completed. At  
some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is  
reset.  
A Page Program (PP) instruction applied to a page which is protected by the Block Protect  
(BP2, BP1, BP0) bits (see Table 3 and Table 4) is not executed.  
Figure 18. Page Program (PP) instruction sequence  
S
0
1
2
3
4
5
6
7
8
9
10  
28 29 30 31 32 33 34 35 36 37 38 39  
C
Instruction  
24-bit address  
Data byte 1  
23 22 21  
MSB  
3
2
1
0
7
6
5
4
3
2
0
1
DQ0  
MSB  
S
C
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55  
Data byte 2  
Data byte 3  
Data byte 256  
7
6
5
4
3
2
0
7
6
5
4
3
2
0
7
6
5
4
3
2
0
1
1
1
DQ0  
MSB  
MSB  
MSB  
AI13739  
1. Address bits A23 to A22 are Don’t care.  
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