PIC18F2480/2580/4480/4580
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 kΩ is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
21.9 Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 21-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input, therefore, must be between
VSS and VDD. If the input voltage deviates from this
FIGURE 21-4:
COMPARATOR ANALOG INPUT MODEL
VDD
VT = 0.6V
RIC
RS < 10k
AIN
Comparator
Input
ILEAKAGE
±100 nA
CPIN
5 pF
VA
VT = 0.6V
VSS
Legend: CPIN
=
=
Input Capacitance
Threshold Voltage
VT
ILEAKAGE = Leakage Current at the pin due to various junctions
RIC
RS
VA
=
=
=
Interconnect Resistance
Source Impedance
Analog Voltage
TABLE 21-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Reset
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Values
on Page:
CMCON(3)
CVRCON(3) CVREN
C2OUT
C1OUT
CVROE
C2INV
CVRR
C1INV
CIS
CM2
CVR2
CM1
CVR1
INT0IF
CM0
CVR0
57
57
58
57
58
58
58
58
58
CVRSS
CVR3
RBIE
BCLIP
BCLIF
BCLIE
RA3
INTCON
IPR2
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
TMR0IF
RBIF
OSCFIP
OSCFIF
OSCFIE
RA7(1)
CMIP(2)
CMIF(2)
CMIE(2)
RA6(1)
—
—
EEIP
EEIF
EEIE
RA4
HLVDIP TMR3IP
HLVDIF TMR3IF
HLVDIE TMR3IE
ECCP1IP
ECCP1IF
ECCP1IE
RA0
PIR2
PIE2
—
PORTA
LATA
RA5
RA2
RA1
LATA7(1)
LATA6(1) LATA Data Output Register
TRISA
TRISA7(1) TRISA6(1) PORTA Data Direction Register
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
Note 1: PORTA pins are enabled based on oscillator configuration.
2: These bits are available in PIC18F4X80 devices and reserved in PIC18F2X80 devices.
3: These registers are unimplemented on PIC18F2X80 devices.
© 2009 Microchip Technology Inc.
DS39637D-page 267