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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
REGISTER 16-4: SSPxCON1: MSSPx CONTROL REGISTER 1 (I2C™ MODE)  
R/W-0  
WCOL  
R/W-0  
R/W-0  
SSPEN(1)  
R/W-0  
CKP  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
SSPOV  
SSPM3  
SSPM2  
SSPM1  
SSPM0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
-n = Value at POR  
bit 7  
WCOL: Write Collision Detect bit  
In Master Transmit mode:  
1= A write to the SSPxBUF register was attempted while the I2C conditions were not valid for a  
transmission to be started (must be cleared in software)  
0= No collision  
In Slave Transmit mode:  
1= The SSPxBUF register is written while it is still transmitting the previous word (must be cleared in  
software)  
0= No collision  
In Receive mode (Master or Slave modes):  
This is a “don’t care” bit.  
bit 6  
SSPOV: Receive Overflow Indicator bit  
In Receive mode:  
1= A byte is received while the SSPxBUF register is still holding the previous byte (must be cleared in  
software)  
0= No overflow  
In Transmit mode:  
This is a “don’t care” bit in Transmit mode.  
bit 5  
bit 4  
SSPEN: Master Synchronous Serial Port Enable bit(1)  
1= Enables the serial port and configures the SDAx and SCLx pins as the serial port pins  
0= Disables serial port and configures these pins as I/O port pins  
CKP: SCK Release Control bit  
In Slave mode:  
1= Release clock  
0= Holds clock low (clock stretch), used to ensure data setup time  
In Master mode:  
Unused in this mode.  
bit 3-0  
SSPM<3:0>: Synchronous Serial Port Mode Select bits  
1111= I2C Slave mode, 10-bit address with Start and Stop bit interrupts enabled  
1110= I2C Slave mode, 7-bit address with Start and Stop bit interrupts enabled  
1011= I2C Firmware Controlled Master mode (slave Idle)  
1000= I2C Master mode, clock = FOSC/(4 * (SSPxADD + 1))  
0111= I2C Slave mode, 10-bit address  
0110= I2C Slave mode, 7-bit address  
Bit combinations not specifically listed here are either reserved or implemented in SPI mode only.  
Note 1: When enabled, the SDAx and SCLx pins must be configured as inputs.  
© 2009 Microchip Technology Inc.  
DS39682E-page 161  
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