PIC18FXX20
BTG
Bit Toggle f
BOV
Branch if Overflow
Syntax:
Operands:
[ label ] BTG f,b[,a]
Syntax:
Operands:
Operation:
[ label ] BOV
-128 ≤ n ≤ 127
if overflow bit is ’1’
(PC) + 2 + 2n → PC
n
0 ≤ f ≤ 255
0 ≤ b < 7
a ∈ [0,1]
(f<b>) → f<b>
None
Operation:
Status Affected:
Encoding:
Status Affected:
Encoding:
Description:
None
1110
0100
nnnn
nnnn
0111
bbba
ffff
ffff
If the Overflow bit is ‘1’, then the
program will branch.
Description:
Bit 'b' in data memory location 'f' is
inverted. If ‘a’ is 0, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
Words:
Cycles:
Words:
Cycles:
Q Cycle Activity:
If Jump:
1
1(2)
Q Cycle Activity:
Q1
Q2
Q3
Q4
Write
Decode
Read
Process
Q1
Q2
Q3
Q4
register 'f'
Data
register 'f'
Decode
Read literal
Process
Data
Write to PC
'n'
BTG
PORTC, 4, 0
Example:
No
No
operation
No
No
operation
Before Instruction:
operation
operation
PORTC
=
0111 0101 [0x75]
If No Jump:
Q1
After Instruction:
Q2
Read literal
'n'
Q3
Q4
No
operation
PORTC
=
0110 0101 [0x65]
Decode
Process
Data
HERE
BOV Jump
Example:
Before Instruction
PC
=
address (HERE)
After Instruction
If Overflow
PC
=
=
=
=
1;
address (Jump)
If Overflow
PC
0;
address (HERE+2)
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 273
MICROCHIP [ MICROCHIP ]
